Tag Archives: motor enhanced management system

Digital Signal Processor (DSP) for Motor Control

Family of DSP is being divided to 3 various types. It is combination of integration of 32 Bit RISC processor and many advanced DSPs such as TMS320C8x family, 32 Bit Floating Point Devices (example TMS320C3x), and l6 Bit Fixed Point DSPs. with regards to TMS3208x and its 2 Billion Operation Per Second (BOBS), application fields of digital motor controls is too much small. 1 application typically is controlling bearing of magnets normally. This is used in turbines for reducing frictions to minimum. Fields of application for 32 DSPs Floating Point is (CNC) Computer Numerical Controlled machines, linear motors highly precisioned with resolutions down to 100nm ranges. This is there in fields of pre-development and research. Use especially of good high levelled language supports such as ā€œCā€ is important. Its conversion efficiently here is important. Work focused on research work is there. This is not there on cost optimization. 16 Fixed Point DSP is used in many types of squirrel caged induction motors, BLDC, Switched reluctance motors and PMSM. Important applications are converters of industrial powers and white goods. This aims at reduction of sensor elements, increasing efficiencies (green aspect being important), decreasing system costs and reducing noises. DSPs Fixed Point with performance ranges of 6.5 MPS to 100 MPS is there. Abilities of controlling complete motor enhanced management system are there. It includes control of digital motor, sensorless approaches, human machine interfaces, power factor corrections and service and security features. For achieving single chip DSP solutions, TI has developed new TMS320F240 DSP Controller Family and derivatives.

New generation of DSP Controller is embedded to Fixed Point DSP Family. Architecture of DSP Controller TMS320F240: DSP Controller F240 is integration of DSP core with Microcontroller peripherals. Intelligent peripherals and performances meet needed factors of enhanced motor system of management being capable of executions of 20 million instructions in 1 second. High performances allow executions of complexed controls and manifold tasks such as sensorless drives controlled (Observers and Kalman Filter) in real times. Minimization of control cycle times or a control loop delay improves dynamic behaviours and results in better disturbance behaviours. DSP Controller F240 is optimized for system application of digital control. It has all features architectural needed for high speeded signal processing. Devices possess all peripherals required for providing single chip DSP stand-alone Controller. Peripherals include high speed serial ports, bit selectable input-output ports, 4 independent timers, 4 capture inputs, 2 10 Bit AD converter with 16 input channels and 12 highly precisioned pulse width modulation outputs. Architecture of DSP Controller F240 is optimized also for control signals processing. 16 Bit word lengths are used together with 32 Bit registers for storage of results intermediate. 2 shifters of hardware are present for CPU scaling numbers being independent. Combination thereby minimizes truncation errors and quantization in turn increasing power processing for functions additionally. DSP Controller F240 core architectures are based on TMS320C5x. this utilizes modified architecture of Harvard for flexibility and speed. Main characteristics of 2xLP cores are static designs of C5x generations. This is with 4 levels pipeline architectures being combined with instruction sets of 2nd generation TI DSPs. In Harvard strict architectures, data and program memory lie in 2 separate spaces. This permits full overlapping of instruction execution and fetch. Processor address 3 memory spaces: Data memory space for the data variables, Input-Output port spaces for accessing data and registers peripherals and program memory spaces for instructions. Processor addresses till 64Kx16 words of program memories, local data memories of 64Kx16 words and input-output ports of 64Kx16 words. Integrated are Dual Access RAM of 544×16 words and FLASH program memory of 16Kx16 words already.

2013 Copyright techgo.org, All right reserved || Privacy Policies, Terms and Disclaimer

Website Administered by MISH IT SOLUTIONS